1. Field of the Invention
The present invention relates to microprocessors having on-chip clock generators that are driven by external clock signals, and more particularly relates to such microprocessors in which the on board clock generator is a divide by one clock generator.
2. Background Art
Microprocessors are typically driven by quartz crystal oscillator clock signal sources that are external to the microprocessor chip itself. The reason for this is that quartz crystal oscillators are very stable in frequency, which is desirable in microprocessor operation. However, while very stable in frequency, it is well known that the duty cycle of quartz crystal oscillators varies considerably from crystal to crystal. As a consequence, the practice that has developed in the art is to provide a quartz crystal oscillator having a frequency that is twice that needed to drive the microprocessor itself, and then provide a divide by two clock generator on the microprocessor chip itself. The divide by two clock generator uses only the leading edge of the quartz crystal clock signal, which is, as described above, very stable, to trigger the rising and falling transitions, thereby providing an on board clock signal that is very stable both with respect to frequency and as to duty cycle.
However, recently microprocessor technology has advanced to the point where the frequency at which microprocessors can be operated has become so great that it is impractical to utilize the traditional divide by two on board clock generator, because the external clock frequency would simply be too high to permit the provision of practical circuitry therefore. Accordingly, sophisticated divide by one clock generators, incorporating phase lock loops or delay line clock generators, have been provided. These new clock macros have the advantage of operating the internal logic at divide by one speed versus the traditional divide by two mode. However these clock generators require the input clock frequency to remain constant in order to generate stable internal clocks.
Another trend in computer technology has been the incorporation of such high performance microprocessors in battery operated personal computers, such as so called lap top and notebook computers. In such computers, the battery life has become a critical design issue. This, in turn, has stimulated focus on power savings in such battery operated personal computers. A well known technique to save power in personal computers is to reduce the clock speed of the microprocessor wherever possible. However, in those instances where the microprocessor is one of the aforementioned high performance microprocessors having a divide by one on board clock generator, shifting the external clock frequency "on the fly", i.e., dynamically, is, as mentioned above, not possible. Changing the input frequency to phase lock loop and delay line clock generators causes the internal clocks to be corrupted, most likely resulting in a code error.
Accordingly, there is a need for a microprocessor having a divide by one on board clock generator that has the ability to accept an external clock which can change frequency during operation, so as to permit such microprocessor to be utilized in low power consumption applications.
This need is met in the present invention.